Hardware & Silicon Validation, Senior Staff Engineer
On-site · Hsinchu, Taiwan, Taiwan
Job Summary
Hardware & Silicon Validation Senior Staff Engineer responsible for PCIe/Ethernet PHY validation in a post-silicon environment, lab bring-up, and cross-functional debugging. Lead validation plans, perform high-speed signal validation (Eye diagram/Jitter/BER), and work with hardware/firmware for PCIe/Ethernet PHY and related protocols. Perform lab measurements with oscilloscopes, analyzers, and diagnostics; collaborate with vendors and customers to resolve post-silicon issues. Requires strong understanding of high-speed SERDES, PCIe protocols, and hands-on validation across PCIe/Ethernet/SAS/SATA domains; 8-10 years of relevant experience; BS (or MS) in Electrical Engineering and expertise in validation automation and data analysis. Preferred knowledge includes PCIe, Ethernet, SERDES modeling, board design, and scripting (Python, Matlab). Additional compensation and benefits described; strict interview integrity and export-control compliance noted.
Required Qualifications
- Bachelor of Science in Electrical Engineering or Master of Science in Electrical Engineering
- 8-10 years experience in High Speed IO testing, debugging and validation
- Strong lab skills with hands on experience in system bring up, testing and debug
- Experience with SERDES characterization tools (Scope, BERT, Network analyzer)
- Strong analytical, problem-solving and communication skills
- Experience with validation-automation development and data analysis (Python, Matlab)
- Excellent written and oral communication in English
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