FPGA IP Software Development Engineer
On-siteBengaluru, Karnataka, India
Job Summary
Drive the end-to-end FPGA Soft IP development lifecycle from micro-architecture definition and RTL coding to timing closure, simulation, and hardware validation. Define micro-architecture and implement clean, reusable RTL code using SystemVerilog, Verilog, or VHDL; manage the full FPGA tool flow including synthesis, place-and-route, constraints, and static timing analysis; resolve multi-clock timing and CDC issues; develop testbenches and conduct block-level simulations to verify logic before target implementation; perform hardware bring-up on evaluation boards using lab equipment; collaborate with software and hardware teams to define specifications, interfaces, and system integration paths.
Required Qualifications
- Bachelor’s or master’s degree in Electronics Engineering, Electrical Engineering, VLSI, Embedded Systems, or a closely related technical discipline
- 7+ years of dedicated experience writing production-grade RTL using System Verilog, Verilog, or VHDL
- Hands-on proficiency with major FPGA vendor toolchains (Altera Quartus Prime, AMD/Xilinx Vivado or Microchip Libero)
- Strong familiarity with static verification methodologies including Linting, CDC validation, and constraint troubleshooting
- Ability to automate tool workflows using Tcl, Python, or Shell scripting
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