FPGA Engineer
On-siteLeudelange, Esch-sur-Alzette, Luxembourg
Job Summary
Architect, design, and implement FPGA firmware in VHDL and Verilog for digital signal processing, baseband, and high-speed interface functions across satellite payload and telecommunications applications. Optimize resource utilization, timing closure, and power efficiency on Xilinx/AMD device families while executing functional and regression simulations to verify RTL behavior. Develop testbenches, integrate with embedded processors, and perform hardware bring-up using logic analyzers and spectrum analyzers to resolve firmware-hardware integration issues. Implement telecommunication algorithms from reference models and prototype solutions on SDR platforms to support proof-of-concept demonstrations. Contribute to design reviews, maintain internal test laboratory capabilities, and document implementation progress for the multidisciplinary engineering team.
Required Qualifications
- Bachelor's degree in Electronic Engineering, Electrical Engineering, Computer Engineering, Telecommunications Engineering, or a closely related discipline
- Minimum three years of demonstrable hands-on experience in FPGA firmware development, including RTL design, simulation, synthesis, and hardware bring-up
- Proficiency in VHDL and/or Verilog/SystemVerilog for RTL design and functional simulation
- Demonstrated experience with Xilinx/AMD FPGA device families and Vivado or Vitis toolchains, including constraint-driven implementation and timing closure
- Working knowledge of FPGA architecture including DSP slices, block RAM, clock management resources, and high-speed serial transceivers
- Experience developing testbenches and executing structured simulation and verification campaigns
- Experience performing hardware bring-up and laboratory testing of FPGA-based systems
- Familiarity with embedded processor integration within FPGA environments, including AXI-based hardware-software interfaces
- Ability to implement and verify algorithms from MATLAB or C/C++ reference models
- Proficiency in spoken and written English
- Resident in Europe with valid right to work
- As part of the recruitment process, candidates may be required to provide a criminal record certificate issued within the last three (3) months
Desired Qualifications
- Experience in space or telecommunications applications
- Candidates with a strong FPGA implementation background from adjacent domains - defence, radar, wireless infrastructure, or high-speed digital systems
- Experience in satellite telecommunications applications, including familiarity with CCSDS, DVB-S2/S2X, DVB-RCS2, or NTN waveform standards
- Experience with SDR platform development, including integration of baseband firmware with RF front-end hardware on platforms such as Xilinx RFSoC, USRP, or Analog Devices ADRV900x/AD936x-based systems
- Experience with Intel/Altera FPGA device families and Quartus Prime toolchain
- Experience with High-Level Synthesis tools including Vivado HLS or Vitis HLS
- Experience with embedded Linux integration on Zynq or Zynq UltraScale+ platforms, including Yocto build environment and kernel driver development
- Familiarity with ASIC-oriented RTL design practices, including synthesis to standard cell libraries, static timing analysis, DFT insertion, or power analysis using tools such as Synopsys Design Compiler or Cadence Genus
- Exposure to radiation-tolerant or space-grade FPGA design constraints and associated verification requirements
- Experience with wireless or telecommunications PHY layer implementation, including digital signal processing for modulation, demodulation, synchronisation, or channel estimation
- Experience contributing to technical documentation, design reviews, or technical proposals in an engineering programme context
- Scripting experience in Python, TCL, or Bash for build automation, test scripting, or tool integration
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