FPGA Engineer (Open also to Protected Categories, Law 68/99)
On-site · Gorgonzola, Lombardy, Italy
Job Summary
FPGA Engineer needed to design signal-processing schemes on FPGA for real-time high-demanding RF SDR architectures. Responsibilities include developing Verilog code and test benches, defining RTL/IP models, performing detailed synthesis and timing analysis, and ensuring RTL functionality meets requirements. Work with project team to ensure adherence to FPGA design processes, support lab evaluation/debug at board level, and assist SW team with debugging to ensure on-time product delivery. Requires Master’s degree in Electronic/Telecommunication Engineering and 4+ years of experience, experience in Telecommunications design and/or SDR architectures, and hands-on FPGA flow experience (timing closure). Proficiency with Xilinx tools (ISE/Vivado), Microsemi architectures, and DO254 compliance is a plus. Strong English and Italian communication skills; travel <10%.
Required Qualifications
- Master’s degree in Electronic/ Telecommunication Engineering
- 4+ years of experience
- Experience in Telecommunications design and/or SDR architectures
- Experience with complete FPGA design flows and timing closure
- Proficiency with Xilinx FPGA tools (ISE and Vivado) and Microsemi architectures/tools
- DO254 design and compliance verification is a plus
- Hands-on experience with C/C++ applications development
- Strong verbal and written communication skills in English and Italian
- Ability to travel less than 10% of the time
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