Experienced ASIC Verification Engineer
Hybrid · Kfar Saba, Central District, Israel
Job Summary
Experienced ASIC Verification Engineer with a BSc in Electrical Engineering and 10+ years in ASIC verification using UVM/SystemVerilog. Responsible for RTL development and verification of complex IPs, collaborating with architecture and SOC teams, and contributing to verification methodology advancement. Requires strong debugging, analytical, and communication skills; capable of leading within a global team. Location: Kfar Saba, Israel; hybrid remote arrangement.
Required Qualifications
- BSc in Electrical Engineering
- At least 10 years of experience in ASIC Verification with UVM Methodology and SystemVerilog
- Excellent analytical and debugging skills
- A good eye for details
- Advanced verbal and written communication skills
- Collaborates to develop self and others within group
- Strong professional leading skills
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