ESD Engineer
On-siteEdinburgh, Scotland, United Kingdom
Job Summary
Design, simulate, and optimize advanced I/O circuits and ESD protection structures; characterize and model I/O libraries to support high-performance mixed-signal design flows; release, maintain, and improve I/O libraries and models used across multiple design teams; apply deep expertise in ESD and latch-up requirements to ensure robust, reliable silicon; drive ESD sign-off for both chip-level and block-level designs, ensuring consistent methodology; act as a technical leader, unifying ESD, latch-up, and I/O strategies—gaining alignment across business units and elevating best practices company-wide.
Required Qualifications
- MSc in Electrical Engineering (or equivalent experience)
- strong track record in advanced circuit design
- holistic understanding of ESD/EOS protection for mixed-signal CMOS circuits
- strong fundamentals in ESD circuit design, layout, and testing
- proven experience in I/O design, including CMOS circuitry, latch‐up mitigation, physical verification, and device‐level characterization
- chip‐level ESD signoff expertise and deep understanding of reliability requirements
- ability to guide layout engineers, ensuring robust, ESD‐safe layout implementation
- proficiency with Cadence schematic capture, layout, and simulation tools
- ability to work independently as well as lead or collaborate within high‐performing technical teams
- clear, effective communication—both written and verbal
- experience in IBIS model generation is a plus
Additional Requirements
- Export control restrictions based on applicable laws and regulations prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license.
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