Engineering Lead

Senior C++ Engineering Lead responsible for architecture, optimization, and system design of latency-critical trading infrastructure; lead technical strategy, code reviews, and engineering standards across the team; optimize across the stack (CPU cache usage, memory layout, NIC tuning, networking); translate quant research into robust, deployable code with full-stack awareness; mentor engineers and drive team-wide improvements in system design and debugging; coordinate with trading and quant research teams on feature delivery and infra upgrades. Requirements include 6+ years of professional C++ development (C++17/20/23), strong OS internals and CPU architecture knowledge, experience building fault-tolerant, throughput-heavy applications, and strong communication skills; nice-to-have in low-latency/high-frequency systems, Python, networking (TCP/UDP), x86 assembly, memory barriers, CPU profiling; participation in algorithmic contests is noted. Remote work across Europe is supported with Amsterdam (NL) and London (GB) as locations, emphasising a flexible workflow and remote setup across Europe. Health insurance, bonuses, and direct access to CTO and trading leads are offered; first meetings underway.