ENGINEER, PACKAGE DEVELOPMENT ENGINEERING, PACKAGE SILICON INTEGRATION
On-site · Singapore, Singapore
Job Summary
Engineer, Package–Silicon Integration in Micron’s Package Development Engineering (PDE) organization. Support chip–package interaction, assist package design, scribe design, and assembly engineers in investigating wafer dicing, singulation, and integration topics; participate in DFMEA/PFMEA activities; support yield, quality, and manufacturability issue investigations; assist in test vehicles and DOEs, including data collection and analysis; learn package and silicon development flows; prepare technical documentation and presentation materials for design reviews and project updates; escalate technical issues and risks and seek guidance as needed.
Required Qualifications
- Bachelor’s or Master’s degree in Engineering
- < 2 years of relevant experience, including internships, co‐op programs, or research experience in semiconductor, materials, or manufacturing fields
- Fundamental understanding of semiconductor manufacturing and/or packaging concepts (coursework or internship level)
- Exposure to structured problem‐solving methods (FMEA, DOE, data analysis)
- Ability to follow defined engineering procedures, analyze straightforward technical problems, and learn from feedback
- Strong attention to detail and willingness to learn new tools, processes, and technologies
- Basic proficiency in Microsoft Excel, Word, and PowerPoint for data analysis and documentation
- Good written and verbal communication skills, with the ability to collaborate effectively in a team environment
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