Engineer Design Verification Engineer
On-site · Bengaluru, Karnataka, India
Job Summary
Engineer Design Verification Engineer responsible for planning and strategizing to verify design at both block and full-chip levels. This role involves creating thorough verification plans, employing UVM-based verification methodology, and driving the development of verification methodologies. Key skills required include proficiency in SystemVerilog, UVM, and experience in post-silicon verification activities. Candidates should have strong inter-personal, teamwork, and communication skills, along with the ability to mentor junior engineers.
Required Qualifications
- B.Tech/M.Tech. in EE/ECE
- 8–12 years of experience in digital SoC verification
- Proficient in System Verilog, UVM, C, Perl, Python
- Experience with testplan development and development of verification environment from ground up
- Knowledge of state-of-the-art verification techniques employing formal verification, testbench qualification, emulation for faster verification
Desired Qualifications
- Knowledge of DSP
- Familiarity with verification of processor based SoC designs
- Strong understanding of formal verification methodologies and tools
- Experience in technically mentoring or coaching junior engineers
Additional Requirements
- Applicants other than US Citizens, US Permanent Residents, and protected individuals may have to go through an export licensing review process
Apply with one swipe on Sorce. We auto-fill applications and apply on your behalf — no cover letters, no 40-minute forms.
Hiring someone like this?
Get your role in front of qualified candidates on Sorce.