DV Solution Architect
$30,000–$45,000 year
On-siteBengaluru, Karnataka, India
Job Summary
Define and lead SoC and subsystem verification strategies, driving verification closure from specification through tapeout. Build scalable verification methodologies and manage complex SoC verification programs. Apply expertise in UVM, SystemVerilog, Assertions, and Coverage-Driven Verification while leading Boot Verification for ARM/RISC-V Compute and Security Subsystems. Leverage knowledge of high-speed protocols including PCIe, DDR, Ethernet, and UCIe, alongside Emulation Acceleration tools like Palladium and Zebu. Incorporate AI-assisted Verification Flows into daily activities. This role requires 12+ years of Design Verification experience with a focus on SoC-Level DV.
Required Qualifications
- 12+ years of Design Verification experience
- Strong SoC-Level DV Experience (Mandatory)
- Experience leading multiple SoC verification programs through tapeout
- Expertise in UVM, SystemVerilog, and Assertions
- Strong Coverage-Driven Verification expertise
- Experience in SoC Boot Verification using Boot Code
- Experience with ARM/RISC-V Compute Subsystems, Security Subsystems, NoC, Debug
- Knowledge of Emulation Acceleration (Palladium / Zebu / Veloce)
- Experience with high-speed protocols like PCIe, DDR, Ethernet, UCIe
- Exposure to AI-assisted Verification Flows
Desired Qualifications
- Formal Verification
- Security Verification
- Functional Safety Verification
- Portable Stimulus Standard (PSS)
- Hardware/Software Co-verification
- HBM/HMC Memory Systems
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