Dry Etch Process Develop Engineer
$107,000–$182,000 year
On-siteAlbany, New York, United States
Job Summary
Develop, qualify, and sustain dry etch (plasma) unit processes for sophisticated memory technologies including dielectric, conductor, and hardmask etch. Optimize critical process metrics such as CD control, profile anisotropy, selectivity, microloading, uniformity, and line edge roughness while driving defect reduction and yield improvement using inline/out-of-line metrology, DOEs, SPC, and statistical data analysis. Perform root-cause analysis for process excursions, tool health issues, and integration failures, partnering with equipment vendors on chamber matching, hardware development, and cost-of-ownership improvements. Document process baselines, change controls, and learning to support technology transition to large-scale production. Collaborate with integration, lithography, thin films, CMP, device, and manufacturing teams to mature processes from R&D into high-volume manufacturing. This full-time role at Micron's Albany, NY site supports the design of AI-enabled solutions for efficiency and decision-making within the Technology Development organization.
Required Qualifications
- M.S. or Ph.D. in Electrical Engineering, Materials Science, Physics, Chemistry, Chemical Engineering, Mechanical Engineering, or a related engineering/technical field relevant to plasma processing and semiconductor manufacturing
- B.S. with 3+ years of semiconductor processing experience with emphasis on dry etch/plasma etch will also be considered
- Experience in semiconductor process development or sustaining engineering, including DOE planning/execution and statistical data analysis
- Working knowledge of plasma etch fundamentals, chamber hardware, and process characterization (profile, CD, selectivity, uniformity, defectivity)
- Ability to collaborate effectively across multi-functional technical teams and communicate results clearly
Desired Qualifications
- Hands-on experience with sophisticated dry etch platforms (e.g., ICP/RIE) and chamber matching across fleets
- Familiarity with pattern transfer challenges (ARDE, microloading, footing/notching) and integration with lithography/hardmask stacks
- Experience with defect characterization techniques and tool health monitoring methodologies
- Experience working with semiconductor equipment vendors, joint development programs, or R&D environments
- Familiarity with technology transfer to high-volume manufacturing and sustaining support in a fab environment
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