DRAM Power Architect (MTS)
On-siteBoise, Idaho, United States
Boise, Idaho, United StatesOn-siteFull TimeSenior LevelEnterprise
Full TimeSenior LevelEnterprise
Job Summary
Conduct DRAM power analysis using IDD and workload-based modeling to generate insights for design optimization. Develop and apply power models to evaluate architecture and system behavior while defining power targets aligned with optimization goals. Collaborate with cross-functional teams to validate analysis results and contribute to DRAM power-related feature development and architecture improvements. Analyze competitor products and industry trends to support benchmarking activities, documenting methodologies and sharing technical findings with the team.
Required Qualifications
- Understand system and customer-level DRAM power requirements
- Translate requirements into analysis and modeling tasks
- Perform DRAM power analysis (IDD, workload-based modeling)
- Generate insights for design optimization
- Develop and apply power models and tools
- Evaluate DRAM architecture and system behavior
- Define power targets based on given optimization goals (power, performance, efficiency)
- Contribute to development of DRAM power-related features and architecture improvements
- Collaborate with cross-functional teams (Design, Product, System) to validate analysis results
- Analyze competitor products and industry trends to support benchmarking activities
- Document methodologies and share technical findings with team members
Desired Qualifications
- Leveraging AI
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