Director, Design For Test
On-siteHyderabad, Telangana, India
Job Summary
Lead a high-impact Design For Test organization accountable for headcount planning, hiring, performance, and talent development across multiple advanced ASIC/SoC programs. Own DFT architecture definition and methodology governance for concurrent custom silicon engagements at 3nm and 2nm nodes, driving the roadmap for scan, MBIST, IJTAG, ATPG, compression, and IP-DFT. Manage teams of senior technical leads while partnering with executive leadership to define resource plans, prioritize programs, and track delivery milestones. Serve as the primary interface with key customers to present architecture proposals and manage technical risk, establishing quality KPIs for test coverage, DPPM, and MPR readiness. Define automation and infrastructure improvements through the M1DPx/Tessent-based flow ecosystem and mentor Director and Principal Engineer-level talent. Represent DFT in cross-functional design reviews, foundry engagements, and EDA vendor partnerships to ensure smooth handoff and post-silicon support within the Custom Silicon Engineering team.
Required Qualifications
- Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or related field
- 15+ years of experience
- 8+ years in DFT
- 3+ years in people management
- Proven experience managing DFT teams of 10+ engineers across distributed global sites
- Strong DFT execution background: Scan, MBIST/BIRA/BISR, JTAG/IJTAG, ATPG (SAF/TDF), OCC, IP-DFX, post-silicon bring-up and debug on complex SoC designs
- Demonstrated experience owning DFT architecture for at least 2–3 major tape-out programs at advanced nodes (7nm or below)
- Hands-on familiarity with Siemens Tessent DFT insertion flows
- Proven ability to manage DFT execution risk, prioritize competing demands, and communicate program status to executive stakeholders
- Strong cross-functional collaboration skills with Physical Design, STA, product engineering, and test operations teams
- Excellent communication and leadership skills
- demonstrated ability to build and sustain high-performing technical teams
- eligible to access export-controlled information as defined under applicable law
Desired Qualifications
- Experience with M1DPx or similar RTL/gate-level DFT flows
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