Director, ASIC Design Verification
On-site · Bengaluru, Karnataka, India
Job Summary
Director of SoC Design Verification leading verification strategy, methodology, infrastructure, and execution for AI, networking, data center, communications, and HPC SoCs. Build and scale world-class verification teams; establish SystemVerilog/UVM-based verification flows from the ground up; drive verification closure, and ensure first-pass silicon success. Lead verification planning from architecture definition through tapeout and production release, and drive continuous improvement of automation, reuse, and productivity. Partner with Architecture, Design, Physical Design, DFT, Firmware, Validation, Software, and Program Management. Oversee verification architecture for ARM Cortex-A/R/M and/or RISC-V subsystems, NoC/interconnect fabrics, memory subsystems, high-speed I/O interfaces, AI/networking/storage/accelerator subsystems, and third-party IP integration. Develop scalable verification environments, reusable testbenches, scoreboards, checkers, assertions, coverage models, regression, and signoff methodologies; champion constrained-random, coverage-driven, and assertion-based verification; leverage formal verification, emulation, FPGA prototyping, and hardware/software co-verification. Lead geographically distributed teams and manage internal staff, contractors, and offshore resources while achieving tapeout milestones and high-quality deliverables.
Required Qualifications
- BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- 15+ years of semiconductor verification experience with a strong focus on complex SoC development
- 5+ years of leadership experience managing verification organizations and technical teams
- Proven track record of delivering multiple successful SoCs from architecture through tapeout and silicon validation
- Deep expertise in SystemVerilog and UVM
- Extensive experience building verification methodologies, testbenches, and infrastructure from scratch
- Strong knowledge of ARM and/or RISC-V architectures and processor subsystem verification
- Extensive experience verifying cache-coherent and high-performance SoC architectures
- Deep understanding of AMBA protocols including AXI, AHB, APB, ACE, and CHI
- Strong expertise in high-speed I/O protocols including PCIe, CXL, Ethernet, UCIe, and SerDes-based interfaces
- Experience with constrained-random verification, coverage-driven verification, assertion-based verification, and formal verification methodologies
- Hands-on experience with simulation, emulation, FPGA prototyping, and hardware/software co-verification
- Demonstrated experience integrating and qualifying third-party IP from multiple vendors
- Proven ability to manage and scale internal teams, external contractors, and offshore verification organizations
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