Digital Verification
$165,830–$165,830 year
On-siteAustin, Texas, United States
Job Summary
Perform professional verification engineering duties in furtherance of architecture and RTL design, developing models or verification environments for Digital functional verification and MRAM IP memory controller verification. Plan and implement design verification strategies to guarantee no functional faults exist according to product specifications, building verification plans from scratch and debugging test cases to validate memory controller features. Create and maintain UVM testbench components, write assertions and functional coverage bins, and analyze coverage holds to provide additional test cases. Review memory controller specifications throughout the project lifecycle and create project scripts to ensure final memory IP hardware is delivered to the SoC team. Requires five years of experience in System Verilog, C/C++, ARM architectures, and Cadence tools.
Required Qualifications
- Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, foreign equivalent or related field
- Five (5) years of progressive post-baccalaureate experience in the job offered, Solutions Architect, Project Engineer, Application Engineer or similar occupations
- Five (5) years of experience in System Verilog and C/C++ languages
- Five (5) years of experience in ARM and DSP architectures
- Five (5) years of experience in Cache and flash memory controllers
- Five (5) years of experience in SOC level verification of ARM-based microcontrollers
- Five (5) years of experience in Cadence
- Five (5) years of experience in Gate-level simulations
- Five (5) years of experience in IP Level verification
Hiring someone like this?
Get your role in front of qualified candidates on Sorce.