Digital Design Engineer
$180,000–$250,000 year
On-siteSanta Clara, California, United States
Job Summary
Develop micro-architecture and author high-quality, synthesizable RTL following best-in-class coding methods and design-for-verification practices. Write firmware and bare-metal diagnostics on embedded RISC CPU IP to configure on-chip analog blocks and low-speed control loops for optical components. Drive pre-silicon simulation and hardware-software co-verification, validating firmware against RTL well ahead of tape-out. Integrate processor subsystems, AMBA fabrics, and serial interfaces like PCIe and UCIe into the SoC. Lead the full implementation flow including synthesis, timing closure, and equivalence checking with clean signoff. Build emulation environments and manage silicon bring-up sequences, root-causing and resolving issues on hardware. Provide responsive support triaging design problems and collaborating with analog, DSP, verification, and physical-design teams.
Required Qualifications
- B.S. or M.S. in Electrical/Electronics or Computer Engineering (or related), with relevant digital ASIC design experience
- Demonstrated experience taking digital designs from RTL through synthesis, timing closure, and silicon bring-up
- Strong fundamentals in digital ASIC design, micro-architecture, and best RTL coding methods
- Firmware / embedded C development, including bare-metal programming on an on-chip RISC CPU IP (e.g., RISC-V or Arm) to drive analog blocks and low-speed loops
- Knowledge of AMBA and serial protocols, processors, and silicon bring-up sequences
- Strong design, emulation, and silicon debug skills, with proven hardware-software integration experience
- Expertise in synthesis, constraints, timing closure, and equivalence checks (Formality / Conformal)
- Experience with Lint / CDC / RDC tools
- Customer-support orientation and excellent communication and oratory skills
Desired Qualifications
- Familiarity with interconnect protocols such as PCIe (Gen5/6/7) and UCIe
- Experience integrating vendor CPU IP and developing the associated firmware, drivers, and diagnostics
- High-speed wireline / SerDes-based SoC experience; UPF low-power design, DFT, and scan/ATPG flows
- Scripting proficiency (Python, Tcl)
Hiring someone like this?
Get your role in front of qualified candidates on Sorce.