DFT Engineer
$106,000–$184,000 year
On-site · Richardson, Texas, United States
Job Summary
DFT Engineer responsible for designing and deploying advanced Design-for-Test (DFT) solutions for semiconductor chip development, including ATPG, MBIST, LBIST, scan insertion, and analog test features. Develop and optimize test pattern generation to minimize test time while maximizing coverage and yield. Integrate DFT requirements into RTL and physical design through collaboration with design, verification, and backend teams. Create automation scripts (TCL, Python, Perl) for test pattern creation, validation, and analysis. Analyze silicon bring-up and production data to identify improvements and support root-cause debugging. Document DFT implementations, test results, and reuse IP for team knowledge sharing.
Required Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- 4+ years of hands-on DFT experience on SoCs, including ATPG, MBIST, LBIST, and scan-based testing
- Proficiency with EDA tools such as Synopsys TestMAX, Cadence Modus, or Mentor Tessent for DFT insertion and pattern generation
- Experience with scripting languages (Python, Perl, TCL) for flow automation and data analysis
- Familiarity with optimizing test time, fault coverage, and ATPG patterns
- Strong analytical skills and attention to detail for debugging complex test failures
- Effective communication skills for cross-functional collaboration
Additional Requirements
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