Design Verification Engineer
$1,500,000–$2,400,000 year
On-siteBengaluru, Karnataka, India
Job Summary
Develop comprehensive design verification plans for complex ASIC/SoC blocks and subsystems using SystemVerilog and UVM. Build reusable verification components including agents, drivers, monitors, and coverage models to validate functional, corner-case, and error scenarios. Execute DDR interface verification for memory controllers, analyzing protocol transactions and debugging simulation failures with waveform tools. Integrate environments with IPs and SoC-level systems while performing root-cause analysis on RTL, testbench, and specification issues. Track coverage metrics, regression results, and bugs to drive projects toward functional and coverage closure. Collaborate with RTL, architecture, and firmware teams to identify design issues early and improve verification methodologies.
Required Qualifications
- 5–8 years of hands-on experience in Design Verification for ASIC, SoC, or complex digital designs
- Strong expertise in DDR protocols and DDR-based memory subsystem verification
- Strong hands-on experience with UVM (Universal Verification Methodology)
- Excellent programming experience in SystemVerilog
- Strong understanding of UVM architecture and methodology, including sequences, sequencers, drivers, monitors, agents, scoreboards, configuration mechanisms, and factory concepts
- Experience developing constrained-random verification environments and reusable verification components
- Strong knowledge of functional coverage, code coverage, assertions, and coverage-driven verification
- Experience with simulation and debug tools such as Synopsys VCS, Cadence Xcelium, or Siemens Questa
- Strong understanding of digital design concepts, RTL, and Verilog/SystemVerilog
- Hands-on experience with regression management, debugging, and verification sign-off
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field
- Strong analytical, debugging, and problem-solving skills
- Ability to work effectively with cross-functional engineering teams
- Strong communication skills and attention to detail
Desired Qualifications
- Experience with DDR3, DDR4, DDR5, LPDDR4, or LPDDR5
- Knowledge of memory controllers, PHY interfaces, initialization sequences, and timing-related scenarios
- Experience with SVA (SystemVerilog Assertions) and formal verification concepts
- Familiarity with scripting languages such as Python, Perl, or Tcl for verification automation
- Experience with SoC-level verification and subsystem integration
- Exposure to AMBA protocols such as AXI, APB, or AHB
- Experience working with complex IP blocks and multi-clock/multi-reset environments
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