Design Verification Engineer (1-Year Contract)
HybridOttawa, Ontario, Canada
Ottawa, Ontario, CanadaHybridContractLarge
ContractLarge
Job Summary
Develop testbenches and verification components including UVCs, models, BFMs, and reusable environments using System Verilog/UVM methodologies. Write, modify, and maintain constraint-random and directed test cases while analyzing functional, code, and test plan coverage. Implement assertions, checkers, and monitors to triage and debug regressions in simulation and formal verification tools. Reproduce functional bugs found in silicon and deploy industry-leading verification techniques such as formal verification. Participate in code reviews to ensure RTL/Firmware design quality with an emphasis on automation, power, and performance.
Required Qualifications
- Notable hardware verification experience
- Proficiency in Verilog
- Proficiency in System Verilog
- Proficiency in UVM
- Experience working in Linux environments
- Experience working in Windows environments
- ASIC design knowledge
- Ability to debug Verilog RTL code using simulation tools
- Excellent programming skills
- Exposure to Makefile
- Exposure to Perl
- Exposure to Python
- Exposure to Ruby
- Electrical Engineering degree
- Computer Engineering degree
Desired Qualifications
- Strong analytical thinking and problem-solving skills
- Excellent attention to detail
- Effective communication and writing skills
- Good teamwork and interpersonal skills
- Experience developing testbenches and verification components such as UVCs, models, BFMs, and re-usable verification environments
- Experience writing, modifying, and maintaining constraint-random and directed test cases and libraries in System Verilog/UVM
- Experience analyzing functional, code, and test plan coverage
- Experience implementing assertions, checkers, and monitors
- Experience triaging and debugging regressions
- Experience deploying industry-leading verification methodologies such as UVM and Formal Verification
- Experience reproducing functional bugs found in silicon, in simulation and/or Formal Verification tools
- Experience conducting and participating in code reviews
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