Design Engineer V
Hybrid · Sunnyvale, California, United States
Sunnyvale, California, United StatesHybridFull TimeSenior LevelBachelors DegreeUnknown
Type
Full Time
Level
Senior Level
Education
Bachelors Degree
Company size
Unknown
Job Summary
Senior ASIC Power Engineer role focusing on power analysis and optimization for ASICs used in Meta's AR/VR products. Responsibilities include PPA optimization with Fusion compiler, RTL/netlist level power analysis, post-processing and scripting for report data, setting up and debugging ASIC flows (Synthesis, PD, Power, Timing), and implementing RTL/UPF blocks. 10+ years of relevant experience and scripting/data analysis skills are required.
Required Qualifications
- BS in Electrical Engineering/Computer Science or equivalent experience
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