Design Engineer III
$152,000–$208,500 year
On-site · Santa Clara, California, United States
Job Summary
Design Engineer III responsible for overall chip design knowledge with hands-on experience in at least one phase of the chip development roadmap; apply domain knowledge to efficiently debug or troubleshoot problems in the given area of expertise in a specific design phase; implement concepts to troubleshoot a variety of complex IC design issues under limited supervision; demonstrate effective technical verbal/written communication and collaboration with immediate team members; follow complex program schedules, budgets, and milestones with direct supervision; identify risks to supervisor and propose possible solutions; demonstrates deep conceptual and practical understanding within own discipline and knowledge of related disciplines; apply integration knowledge across segments/functions; lead small projects with manageable risks and resources; and contribute to meeting customer, operational, and project objectives within established guidelines.
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