DDR & HBM Validation Engineer
On-site · Bengaluru, Karnataka, India
Job Summary
DDR & HBM Validation Engineer responsible for bring-up, validation, characterization and debugging of DDR/HBM memory subsystems for AI compute platforms. Collaborates with silicon design, firmware, characterization, platform and systems teams to ensure memory subsystem functionality, performance and reliability. Performs validation through functional, stress and corner-case tests; analyzes logs and results; develops Python-based automation and tooling; conducts PHY characterization and analog-level analysis during stress tests; and documents validation results for broader engineering teams.
Required Qualifications
- Strong experience validating DDR, LPDDR, HBM or related DRAM technologies
- Deep understanding of DRAM architecture, memory subsystem operation and memory controller functionality
- Experience interfacing with firmware, BIOS and Embedded C development
- Strong programming skills in C and Python
- Hands-on experience using laboratory equipment including oscilloscopes and related measurement instrumentation
- Experience performing functional testing and signal measurements including voltage, frequency and timing analysis
- Experience with memory subsystem performance analysis and workload characterization
- Experience debugging complex hardware, firmware and system-level issues
- Excellent communication and collaboration skills with the ability to work effectively across multidisciplinary teams
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