Custom SOC IP Verification Engineer
$168,000–$264,500 year
On-siteAustin, Texas, United States or Santa Clara, California, United States
Job Summary
Verify the correctness, performance, and compliance of on-chip fabrics and interconnect subsystems from IP bring-up through full chip integration. Develop UVM-based test plans and design constrained-random and directed SystemVerilog testbenches targeting NoC topologies and multi-agent SoC integrations. Collaborate with Architecture, SW/FW, Design, and Post-Silicon Validation teams to execute comprehensive verification strategies for DMA, routing, arbitration, and protocol compliance. This role supports NVIDIA's next-generation GPU and AI accelerator SoC designs, ensuring robust connectivity across complex custom SOC architectures.
Required Qualifications
- B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent experience)
- 6+ years of experience in ASIC verification, with a strong focus on fabric, interconnect, or network-on-chip verification at both IP and full chip levels
- Strong knowledge of SystemVerilog and UVM methodology
- Hands-on experience with industry-standard interconnect and bus protocols (e.g., AMBA AXI, CHI, or equivalent), with solid understanding of ordering, coherency, and flow control semantics
- Familiarity with SoC architectures, NoC topologies, and multi-initiator/multi-target interconnect designs
- Proficiency in scripting languages (Python, Perl, TCL)
- Knowledge of performance verification and bandwidth/latency analysis for interconnect fabrics
- Exposure to verification IPs for bus protocols, or emulation platforms (e.g., Palladium, Veloce) for full chip fabric validation
- Experience in GPU or AI accelerator SoC interconnect verification
- Experience with formal verification or assertion-based verification (SVA) applied to fabric and protocol properties
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