CPU Design Methodology Engineer
$168,000–$264,500 year
RemoteAustin, Texas, United States or Santa Clara, California, United States
Job Summary
Define and develop system-level methodologies and tools to build SOCs in an efficient and scalable manner. Identify inefficiencies in the front-end chip implementation process and propose improvements. Own front-end design quality checks and reviews to present high-quality RTL to the physical design team. Interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, and DFT teams to support complex chip builds. This role requires a Master's in Computer or Electrical Engineering with 8+ years of experience in SOC integration and design automation. Base salary ranges from 168,000 to 264,500 USD for Level 4 and 196,000 to 310,500 USD for Level 5. Applications are accepted until August 22, 2026.
Required Qualifications
- Masters in Computer or Electrical Engineering or equivalent experience
- 8+ years of experience in chip design, specializing in SOC integration and design automation
- Excellent analytical and problem-solving skills
- Experience in RTL design (Verilog)
- Experience in verification (UVM, System Verilog)
- Experience in System-On-Chip design/integration flow
- Experience in design automation
- Strong coding skills in Perl, Python, or other industry-standard scripting languages
Desired Qualifications
- Experience in synthesis and physical design is a plus
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