Chief Systems Engineer (CSE)
$120,000–$200,000 year
On-siteArlington, Texas, United States or Saratoga, California, United States
Arlington, Texas, United States or Saratoga, California, United StatesOn-siteFull Time$120,000–$200,000 yearSenior LevelSmall
Full TimeSenior LevelSmall
Job Summary
Own the System Requirements Document, ICDs, and resource budgets across the full program lifecycle while leading system-level trade studies spanning spacecraft, ground segment, and user terminal interfaces. Baseline all electrical ICDs, enforce spacecraft-level power distribution and EMI/EMC standards, and execute G2 Gate receiving processes including integration and FlatSat, TVAC, and vibration campaigns. Operate the System Integration Laboratory, lead anomaly investigations, and chair the Technical Review Board to oversee requirements traceability from SRD to test evidence. Serve as the first escalation point for inter-division technical disputes and make binding decisions on production ECOs while driving the digital thread connecting design artifacts to on-orbit telemetry.
Required Qualifications
- 15+ years of progressive systems engineering experience in the space industry
- at least one flight project carried from SRR through on-orbit operations
- Constellation program experience — direct accountability for spacecraft-level architecture, cross-vehicle interface management, or system-level verification across a multi-satellite fleet
- Direct responsibility for requirements traceability and verification closure
- presented and defended technical baselines at formal design reviews (SRR, PDR, CDR, QR) before a standing review board
- Demonstrated background in RF link design, phased array systems, modem/waveform, or OSI Layer 1–2 protocol architecture
- Prior hands-on subsystem leadership (payload, bus, or ground) before transitioning to systems engineering
- Demonstrated record of building and developing multi-discipline systems engineering teams, including recruiting and retaining Principal Engineers
- Experience presenting to and defending technical baselines before external review boards
- Bachelor's or Master's degree in Aerospace, Electrical, or Systems Engineering — or equivalent verifiable experience
- U.S. persons (U.S. citizens, lawful permanent residents, and individuals granted asylum or refugee status)
- work authorization for the location of this role
- full time employment
- exempt position classification
- Saratoga office location
- access to controlled technical data
- 100% closure of Requirements Compliance Matrix before Phase Close Gate
- Serve as the first escalation point for all inter-division technical disputes across RF, power, structures, software, and semiconductors
- Act as configuration baseline custodian and hold block upgrade architecture authority
- Provide technical concurrence on all production ECOs as standing CCB member
- Make and defend binding technical decisions under uncertainty — including accepting residual risk with documented rationale
- Own the program digital thread connecting requirements, design artifacts, verification evidence, as-built records, and on-orbit telemetry
- Drive working-level use of MBSE tools including DOORS NG, Cameo, and SysML across the systems engineering team
- Own the System Requirements Document (SRD), all ICDs, and resource budgets (mass, power, pointing, ΔV) across the full program lifecycle
- Lead system-level trade studies spanning spacecraft, ground segment, and user terminal interfaces
- Decompose system requirements to subsystem allocations and manage the trade space across mass, power, pointing, and cost
- Baseline all ICDs including the complete electrical ICD set and maintain configuration control through every program gate
- Own spacecraft-level electrical architecture and design standards; define the electrical ICD framework to which every hardware VP and Semiconductor Development designs
- Exercise dotted-line authority to lead electrical engineers across all hardware VP organizations
- Enforce spacecraft-level power distribution, grounding and shielding, EMI/EMC (MIL-STD-461), signal integrity, and connector/harness standards
- Own and execute the G2 Gate receiving process, spacecraft integration, and FlatSat, TVAC, Vibration/Acoustic, and EMI/EMC campaigns
- Own and operate the System Integration Laboratory (SIL) and Hardware-in-the-Loop (HIL) facilities
- Lead anomaly investigation and disposition for all system-level test findings
- Baseline the V&V Plan at PDR
- define and track a minimum of 15 Technical Performance Measures (TPMs) through every gate
- Chair the Technical Review Board (TRB) and oversee requirements traceability from SRD to test evidence
Desired Qualifications
- Experience with MBSE tools (DOORS NG, Cameo, SysML) in a production program environment
- Familiarity with digital thread architectures connecting engineering design to manufacturing execution systems
- Prior experience as CSE or Deputy CSE on a constellation program with ≥10 satellites
- Background in phased array or digital beamforming system architecture
- Familiarity with DCSA or IC program accreditation processes for classified systems
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