ASIC Verification Engineer
On-site · San Jose, California, United States
Job Summary
ASIC Verification Engineer responsible for RTL SoC/Subsystem verification of ARM-based SoCs, applying UVM, Portable Stimulus, and Formal verification; lead test plan development and perform top-level, block-level, and system-level verification; collaborate with firmware, software, DV, FPGA, DFT, and SoC integration teams through ASIC development to production maturity; must have experience verifying AMBA AXI/AHB/APB protocols and various interfaces (PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART); strong scripting (Python, Perl, Shell) and experience with Bitbucket/Jenkins and JIRA; BE/BTECH or ME/MTECH in EE/EECS/CS.
Required Qualifications
- 8+ years of experience in UVM verification and UVM environment development
- Proficient in test plan definition and testcase development in C/Assembly/SystemVerilog
- Expertise in RTL verification and gate-level simulation
- Must have worked on AMBA AXI, AHB, APB protocols
- Experience in functional test vector development and post-silicon bring-up/debug
- Experience with verification of interfaces such as PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART
- Fluency with scripting languages (Perl, Python, Shell)
- Experience with repository tools like Bitbucket/Jenkins and bug tracking tools like JIRA
- BE/BTECH or ME/MTECH degree in EE/EECS/CS or equivalent
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