Analog Mask Design Engineer
HybridBengaluru, Karnataka, India
Bengaluru, Karnataka, IndiaHybridFull TimeEnterprise
Full TimeEnterprise
Job Summary
Execute IC layout of cutting-edge, high-performance CMOS integrated circuits in 2nm, 3nm, 5nm, and 7nm nodes. Lead full custom layout of analog/mixed-signal blocks including op-amps, ADCs, and DACs, while optimizing physical verification activities such as DRC, LVS, and density analysis. Drive identification and resolution of complex physical design issues, mentoring junior engineers and ensuring alignment with matching, symmetry, and parasitic sensitivity requirements. Cultivate effective teamwork across multi-functional teams and represent the group in technical discussions with customers.
Required Qualifications
- 2+ years of experience in high performance analog layout in advanced CMOS process
- BE/M-Tech in Electrical & Electronics or equivalent experience
- Thorough knowledge of industry standard EDA tools for Cadence
- Experience with layout of high-performance analog blocks such as Current mirrors, Sense Amps, bandgaps etc.
- Knowledge in analog design and layout guidelines, high speed IO, (matching devices, symmetrical layout, signal shielding, other analog specific guidelines)
- Experience with floor planning, block level routing and macro level assembly
- Knowledge of high-performance analog layout techniques such as common centroid layout, matching, symmetrical layout, signal shielding, use of dummy devices, thermal aware layout with consideration for electro migration and other analog specific guidelines
- Demonstrated experience with analog layout for silicon chips in mass production
- Background with sub-micron design in foundry CMOS nodes 7nm finfet and below
Desired Qualifications
- Experience working in distributed design team is a plus
- Background with sub-micron design in foundry CMOS nodes 7nm finfet and below is preferred
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